// BMM LOC annotation file.
//
// Release 2013.2 -  HEAD, build April 01, 2013
// Copyright (c) 1995-2015 Xilinx, Inc.  All rights reserved.


///////////////////////////////////////////////////////////////////////////////
//
// Processor 'i_system_wrapper_system_i_sys_mb', ID 100, memory map.
//
///////////////////////////////////////////////////////////////////////////////

ADDRESS_MAP i_system_wrapper_system_i_sys_mb MICROBLAZE-LE 100 i_system_wrapper/system_i/sys_mb

    ///////////////////////////////////////////////////////////////////////////////
    //
    // Processor 'i_system_wrapper_system_i_sys_mb' address space 'i_system_wrapper_system_i_sys_ilmb_cntlr' 0x00000000:0x00001FFF (8 KBytes).
    //
    ///////////////////////////////////////////////////////////////////////////////

    ADDRESS_SPACE i_system_wrapper_system_i_sys_ilmb_cntlr RAMB32 [0x00000000:0x00001FFF] i_system_wrapper/system_i/sys_ilmb_cntlr
        BUS_BLOCK
            i_system_wrapper/system_i/sys_lmb_bram/U0/inst_blk_mem_gen/gnative_mem_map_bmg.native_mem_map_blk_mem_gen/valid.cstr/ramloop[1].ram.r/prim_noinit.ram/DEVICE_7SERIES.WITH_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.TDP_SP36_NO_ECC_ATTR.ram RAMB32 [31:16] [0:2047] PLACED = X2Y21;
            i_system_wrapper/system_i/sys_lmb_bram/U0/inst_blk_mem_gen/gnative_mem_map_bmg.native_mem_map_blk_mem_gen/valid.cstr/ramloop[0].ram.r/prim_noinit.ram/DEVICE_7SERIES.WITH_BMM_INFO.TRUE_DP.SIMPLE_PRIM36.TDP_SP36_NO_ECC_ATTR.ram RAMB32 [15:0] [0:2047] PLACED = X2Y20;
        END_BUS_BLOCK;
    END_ADDRESS_SPACE;

END_ADDRESS_MAP;

